FIR filters are well suited to implementation on multiplier-accumulators (MACs). At output sampling rates well below the maximum operating rate of a given MAC and for relatively short (low order) filters, a single MAC may be sufficient. However, for high output rates and/or long (high order) filters, multiple MACs will be required. An improved FIR filter can simplify the design in this case.
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MOTOROLA Technical Developments Volume 5 October 1985
IMPROVED DECIMATING FIR FILTER
by Katherine H. Lambert and Lester A. Longley
FIR filters are well suited to implementation on multiplier-accumulators (MACs). At output sampling rates well below the maximum operating rate of a given MAC and for relatively short (low order) filters, a single MAC may be sufficient. However, for high output rates and/or long (high order) filters, multiple MACs will be required. An improved FIR filter can simplify the design in this case.
The conventional implementation of a high-speed/high-order (nondecimating) FIR filter uses MACs to multiply the current input sample by a specified coefficient, and to add that product to the previous output of the prior MAC. For an N-tap filter, N cascaded MACs are needed. This approach is most reasonable when the sampling rate f, is not much less than the MAC maximum operating rate f,,.
With a decimating FIR filter, for which the input sampling rate f, exceeds the output rate by a factor M, this structure would be adapted so that each of the (N/M) MACs computes a partial sum of products using a subset of M filter coefficients, which is passed to the subsequent MAC at each output sample time. (For simplicity, it is assumed that M divides N.) This arrangement requires MACs which include a "preload" capability (or a sum in- put), so that the partial sum of products from the prior MAC can be preloaded in the accumulator (or added to the current...
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